Circuit Semantics Gets Patent on Its Core Technology for Estimating Performance of Integrated Circuit Designs
SAN JOSE, Calif.--(BUSINESS WIRE)--Jan. 23, 2003--Circuit
Semantics Inc. (CSI), the next generation provider of timing and
characterization solutions for high-performance integrated circuit
(IC) design, today announced that patent number US 6,499,129 has been
issued by the United States Patent and Trademark Office. This patent
applies to the core technology that drives all Circuit Semantics
characterization and modeling solutions. These solutions are used for
automatically determining the cell functionality and analyzing
performance and power characteristics of IC designs.
This patent is key to Circuit Semantics' unique, algorithmic
approach for circuit partitioning, function recognition, and
comprehensive vector generation. This new approach to circuit
characterization and modeling provides the capability to characterize
and model complex nanometer designs in an automated fashion, unlike
previous generation solutions based on scripts and templates. This
algorithmic approach also enables the more accurate modeling required
for the analysis of nanometer designs below 0.13-micron.
Circuit Semantics solutions include: DynaCell(R), a standard and
custom cell characterization tool whose capabilities include timing
and function identification, power and robust I/O characterization in
a single package; DynaCore(TM), whose basic configuration provides
in-place characterization of all "cells" in a block, plus a static
analyzer for comprehensive path tracing analysis of blocks and chips;
and DynaModel(TM), which provides an efficient translation from
transistor-level design to Verilog functional models.
About Circuit Semantics Inc.
Circuit Semantics Inc. provides timing and characterization
solutions for high-performance cells, cores, and blocks based on
innovative, patented technology. IC designers employ these mixed-level
solutions to create high-performance chips using full-custom and
structured-custom methodologies. Its products support precise,
gate-level abstraction of transistor-level circuits to accelerate
timing closure for designs fabricated in deep submicron (DSM) process
technologies. These solutions are especially well suited for the
microprocessor, digital signal processing (DSP), graphics and the
high-speed communications markets. Circuit Semantics is headquartered
at 2590 North First Street, Suite 301, San Jose, Calif. 95131.
Telephone: 408/571-4800. FAX number: 408/468-1468. For more online
information, visit its website at: http://www.circuitsemantics.com.
DynaCell is a registered trademark of Circuit Semantics. DynaCore
and DynaModel are trademarks of Circuit Semantics Inc.
CONTACT: Circuit Semantics Inc.
Jose Torres, 408/571-4813
jose.torres@circuitsemantics.com
